11#include "hardware/structs/spi.h"
12#include "hardware/regs/dreq.h"
15#ifndef PARAM_ASSERTIONS_ENABLED_HARDWARE_SPI
16#ifdef PARAM_ASSERTIONS_ENABLED_SPI
17#define PARAM_ASSERTIONS_ENABLED_HARDWARE_SPI PARAM_ASSERTIONS_ENABLED_SPI
19#define PARAM_ASSERTIONS_ENABLED_HARDWARE_SPI 0
59#define spi0 ((spi_inst_t *)spi0_hw)
67#define spi1 ((spi_inst_t *)spi1_hw)
75#if !defined(PICO_DEFAULT_SPI_INSTANCE) && defined(PICO_DEFAULT_SPI)
76#define PICO_DEFAULT_SPI_INSTANCE() (__CONCAT(spi,PICO_DEFAULT_SPI))
92#ifdef PICO_DEFAULT_SPI_INSTANCE
93#define spi_default PICO_DEFAULT_SPI_INSTANCE()
105static_assert(NUM_SPIS == 2,
"");
106#define SPI_NUM(spi) ((spi) == spi1)
118static_assert(NUM_SPIS == 2,
"");
119#define SPI_INSTANCE(num) ((num) ? spi1 : spi0)
135#define SPI_DREQ_NUM(spi, is_tx) (DREQ_SPI0_TX + SPI_NUM(spi) * 2 + !(is_tx))
219 invalid_params_if(HARDWARE_SPI, spi !=
spi0 && spi !=
spi1);
245 invalid_params_if(HARDWARE_SPI, data_bits < 4 || data_bits > 16);
247 invalid_params_if(HARDWARE_SPI, order != SPI_MSB_FIRST);
248 invalid_params_if(HARDWARE_SPI, cpol != SPI_CPOL_0 && cpol != SPI_CPOL_1);
249 invalid_params_if(HARDWARE_SPI, cpha != SPI_CPHA_0 && cpha != SPI_CPHA_1);
252 uint32_t enable_mask = spi_get_hw(spi)->cr1 & SPI_SSPCR1_SSE_BITS;
256 ((uint)(data_bits - 1)) << SPI_SSPCR0_DSS_LSB |
257 ((uint)cpol) << SPI_SSPCR0_SPO_LSB |
258 ((uint)cpha) << SPI_SSPCR0_SPH_LSB,
259 SPI_SSPCR0_DSS_BITS |
260 SPI_SSPCR0_SPO_BITS |
261 SPI_SSPCR0_SPH_BITS);
278 uint32_t enable_mask = spi_get_hw(spi)->cr1 & SPI_SSPCR1_SSE_BITS;
282 hw_set_bits(&spi_get_hw(spi)->cr1, SPI_SSPCR1_MS_BITS);
300 return (spi_get_const_hw(spi)->sr & SPI_SSPSR_TNF_BITS);
310 return (spi_get_const_hw(spi)->sr & SPI_SSPSR_RNE_BITS);
320 return (spi_get_const_hw(spi)->sr & SPI_SSPSR_BSY_BITS);
static __force_inline void hw_set_bits(io_rw_32 *addr, uint32_t mask)
Atomically set the specified bits to 1 in a HW register.
Definition address_mapped.h:135
static __force_inline void hw_write_masked(io_rw_32 *addr, uint32_t values, uint32_t write_mask)
Set new values for a sub-set of the bits in a HW register.
Definition address_mapped.h:171
static __force_inline void hw_clear_bits(io_rw_32 *addr, uint32_t mask)
Atomically clear the specified bits to 0 in a HW register.
Definition address_mapped.h:145
@ DREQ_SPI1_TX
Select SPI1's TX FIFO as DREQ.
Definition dreq.h:85
@ DREQ_SPI1_RX
Select SPI1's RX FIFO as DREQ.
Definition dreq.h:86
@ DREQ_SPI0_RX
Select SPI0's RX FIFO as DREQ.
Definition dreq.h:84
@ DREQ_SPI0_TX
Select SPI0's TX FIFO as DREQ.
Definition dreq.h:83
static bool spi_is_writable(const spi_inst_t *spi)
Check whether a write can be done on SPI device.
Definition spi.h:299
static void spi_set_slave(spi_inst_t *spi, bool slave)
Set SPI master/slave.
Definition spi.h:276
static void spi_set_format(spi_inst_t *spi, uint data_bits, spi_cpol_t cpol, spi_cpha_t cpha, __unused spi_order_t order)
Configure SPI.
Definition spi.h:244
uint spi_init(spi_inst_t *spi, uint baudrate)
Initialise SPI instances.
Definition spi.c:21
static bool spi_is_readable(const spi_inst_t *spi)
Check whether a read can be done on SPI device.
Definition spi.h:309
uint spi_set_baudrate(spi_inst_t *spi, uint baudrate)
Set SPI baudrate.
Definition spi.c:42
#define SPI_NUM(spi)
Returns the SPI number for a SPI instance.
Definition spi.h:106
#define spi1
Definition spi.h:67
int spi_read_blocking(spi_inst_t *spi, uint8_t repeated_tx_data, uint8_t *dst, size_t len)
Read from an SPI device.
spi_cpol_t
Enumeration of SPI CPOL (clock polarity) values.
Definition spi.h:149
int spi_write_blocking(spi_inst_t *spi, const uint8_t *src, size_t len)
Write to an SPI device, blocking.
static bool spi_is_busy(const spi_inst_t *spi)
Check whether SPI is busy.
Definition spi.h:319
static uint spi_get_dreq(spi_inst_t *spi, bool is_tx)
Return the DREQ to use for pacing transfers to/from a particular SPI instance.
Definition spi.h:428
int spi_read16_blocking(spi_inst_t *spi, uint16_t repeated_tx_data, uint16_t *dst, size_t len)
Read from an SPI device.
static uint spi_get_index(const spi_inst_t *spi)
Convert SPI instance to hardware instance number.
Definition spi.h:218
spi_cpha_t
Enumeration of SPI CPHA (clock phase) values.
Definition spi.h:141
#define spi0
Definition spi.h:59
uint spi_get_baudrate(const spi_inst_t *spi)
Get SPI baudrate.
Definition spi.c:76
#define SPI_DREQ_NUM(spi, is_tx)
Returns the dreq_num_t used for pacing DMA transfers to or from this SPI instance....
Definition spi.h:135
spi_order_t
Enumeration of SPI bit-order values.
Definition spi.h:157
int spi_write_read_blocking(spi_inst_t *spi, const uint8_t *src, uint8_t *dst, size_t len)
Write/Read to/from an SPI device.
int spi_write16_blocking(spi_inst_t *spi, const uint16_t *src, size_t len)
Write to an SPI device.
int spi_write16_read16_blocking(spi_inst_t *spi, const uint16_t *src, uint16_t *dst, size_t len)
Write/Read half words to/from an SPI device.
void spi_deinit(spi_inst_t *spi)
Deinitialise SPI instances.
Definition spi.c:36
struct spi_inst spi_inst_t
Opaque type representing an SPI instance.
Definition spi.h:51