Halide 18.0.0
Halide compiler and libraries
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Target.h
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1#ifndef HALIDE_TARGET_H
2#define HALIDE_TARGET_H
3
4/** \file
5 * Defines the structure that describes a Halide target.
6 */
7
8#include <bitset>
9#include <cstdint>
10#include <string>
11
12#include "DeviceAPI.h"
13#include "Type.h"
15
16namespace Halide {
17
18/** A struct representing a target machine and os to generate code for. */
19struct Target {
20 /** The operating system used by the target. Determines which
21 * system calls to generate.
22 * Corresponds to os_name_map in Target.cpp. */
35
36 /** The architecture used by the target. Determines the
37 * instruction set to use.
38 * Corresponds to arch_name_map in Target.cpp. */
48
49 /** The bit-width of the target machine. Must be 0 for unknown, or 32 or 64. */
50 int bits = 0;
51
52 /** The bit-width of a vector register for targets where this is configurable and
53 * targeting a fixed size is desired. The default of 0 indicates no assumption of
54 * fixed size is allowed. */
55 int vector_bits = 0;
56
57 /** The specific processor to be targeted, tuned for.
58 * Corresponds to processor_name_map in Target.cpp.
59 *
60 * New entries should be added to the end. */
61 enum Processor {
62 /// Do not tune for any specific CPU. In practice, this means that halide will decide the tune CPU based on the enabled features.
64 K8, /// Tune for AMD K8 Hammer CPU (AMD Family 0Fh, launched 2003).
65 K8_SSE3, /// Tune for later versions of AMD K8 CPU, with SSE3 support.
66 AMDFam10, /// Tune for AMD K10 "Barcelona" CPU (AMD Family 10h, launched 2007).
67 BtVer1, /// Tune for AMD Bobcat CPU (AMD Family 14h, launched 2011).
68 BdVer1, /// Tune for AMD Bulldozer CPU (AMD Family 15h, launched 2011).
69 BdVer2, /// Tune for AMD Piledriver CPU (AMD Family 15h (2nd-gen), launched 2012).
70 BdVer3, /// Tune for AMD Steamroller CPU (AMD Family 15h (3nd-gen), launched 2014).
71 BdVer4, /// Tune for AMD Excavator CPU (AMD Family 15h (4th-gen), launched 2015).
72 BtVer2, /// Tune for AMD Jaguar CPU (AMD Family 16h, launched 2013).
73 ZnVer1, /// Tune for AMD Zen CPU (AMD Family 17h, launched 2017).
74 ZnVer2, /// Tune for AMD Zen 2 CPU (AMD Family 17h, launched 2019).
75 ZnVer3, /// Tune for AMD Zen 3 CPU (AMD Family 19h, launched 2020).
76 ZnVer4, /// Tune for AMD Zen 4 CPU (AMD Family 19h, launched 2022).
78
79 /** Optional features a target can have.
80 * Corresponds to feature_name_map in Target.cpp.
81 * See definitions in HalideRuntime.h for full information.
82 */
83 enum Feature {
174 };
175 Target() = default;
176 Target(OS o, Arch a, int b, Processor pt, const std::vector<Feature> &initial_features = std::vector<Feature>(),
177 int vb = 0)
178 : os(o), arch(a), bits(b), vector_bits(vb), processor_tune(pt) {
179 for (const auto &f : initial_features) {
180 set_feature(f);
181 }
182 validate_features();
183 }
184
185 Target(OS o, Arch a, int b, const std::vector<Feature> &initial_features = std::vector<Feature>())
187 }
188
189 /** Given a string of the form used in HL_TARGET
190 * (e.g. "x86-64-avx"), construct the Target it specifies. Note
191 * that this always starts with the result of get_host_target(),
192 * replacing only the parts found in the target string, so if you
193 * omit (say) an OS specification, the host OS will be used
194 * instead. An empty string is exactly equivalent to
195 * get_host_target().
196 *
197 * Invalid target strings will fail with a user_error.
198 */
199 // @{
200 explicit Target(const std::string &s);
201 explicit Target(const char *s);
202 // @}
203
204 /** Check if a target string is valid. */
205 static bool validate_target_string(const std::string &s);
206
207 /** Return true if any of the arch/bits/os fields are "unknown"/0;
208 return false otherwise. */
209 bool has_unknowns() const;
210
211 void set_feature(Feature f, bool value = true);
212
213 void set_features(const std::vector<Feature> &features_to_set, bool value = true);
214
215 bool has_feature(Feature f) const;
216
218 return has_feature((Feature)f);
219 }
220
221 bool features_any_of(const std::vector<Feature> &test_features) const;
222
223 bool features_all_of(const std::vector<Feature> &test_features) const;
224
225 /** Return a copy of the target with the given feature set.
226 * This is convenient when enabling certain features (e.g. NoBoundsQuery)
227 * in an initialization list, where the target to be mutated may be
228 * a const reference. */
230
231 /** Return a copy of the target with the given feature cleared.
232 * This is convenient when disabling certain features (e.g. NoBoundsQuery)
233 * in an initialization list, where the target to be mutated may be
234 * a const reference. */
236
237 /** Is a fully feature GPU compute runtime enabled? I.e. is
238 * Func::gpu_tile and similar going to work? Currently includes
239 * CUDA, OpenCL, Metal and D3D12Compute. */
240 bool has_gpu_feature() const;
241
242 /** Does this target allow using a certain type. Generally all
243 * types except 64-bit float and int/uint should be supported by
244 * all backends.
245 *
246 * It is likely better to call the version below which takes a DeviceAPI.
247 */
248 bool supports_type(const Type &t) const;
249
250 /** Does this target allow using a certain type on a certain device.
251 * This is the prefered version of this routine.
252 */
253 bool supports_type(const Type &t, DeviceAPI device) const;
254
255 /** Returns whether a particular device API can be used with this
256 * Target. */
258
259 /** If this Target (including all Features) requires a specific DeviceAPI,
260 * return it. If it doesn't, return DeviceAPI::None. If the Target has
261 * features with multiple (different) DeviceAPI requirements, the result
262 * will be an arbitrary DeviceAPI. */
264
265 bool operator==(const Target &other) const {
266 return os == other.os &&
267 arch == other.arch &&
268 bits == other.bits &&
269 processor_tune == other.processor_tune &&
270 features == other.features;
271 }
272
273 bool operator!=(const Target &other) const {
274 return !(*this == other);
275 }
276
277 /**
278 * Create a "greatest common denominator" runtime target that is compatible with
279 * both this target and \p other. Used by generators to conveniently select a suitable
280 * runtime when linking together multiple functions.
281 *
282 * @param other The other target from which we compute the gcd target.
283 * @param[out] result The gcd target if we return true, otherwise unmodified. Can be the same as *this.
284 * @return Whether it was possible to find a compatible target (true) or not.
285 */
287
288 /** Convert the Target into a string form that can be reconstituted
289 * by merge_string(), which will always be of the form
290 *
291 * arch-bits-os-processor-feature1-feature2...featureN.
292 *
293 * Note that is guaranteed that Target(t1.to_string()) == t1,
294 * but not that Target(s).to_string() == s (since there can be
295 * multiple strings that parse to the same Target)...
296 * *unless* t1 contains 'unknown' fields (in which case you'll get a string
297 * that can't be parsed, which is intentional).
298 */
299 std::string to_string() const;
300
301 /** Given a data type, return an estimate of the "natural" vector size
302 * for that data type when compiling for this Target. */
304
305 /** Given a data type, return an estimate of the "natural" vector size
306 * for that data type when compiling for this Target. */
307 template<typename data_t>
310 }
311
312 /** Return true iff 64 bits and has_feature(LargeBuffers). */
313 bool has_large_buffers() const {
314 return bits == 64 && has_feature(LargeBuffers);
315 }
316
317 /** Return the maximum buffer size in bytes supported on this
318 * Target. This is 2^31 - 1 except on 64-bit targets when the LargeBuffers
319 * feature is enabled, which expands the maximum to 2^63 - 1. */
321 if (has_large_buffers()) {
322 return (((uint64_t)1) << 63) - 1;
323 } else {
324 return (((uint64_t)1) << 31) - 1;
325 }
326 }
327
328 /** Get the minimum cuda capability found as an integer. Returns
329 * 20 (our minimum supported cuda compute capability) if no cuda
330 * features are set. */
332
333 /** Get the minimum Vulkan capability found as an integer. Returns
334 * 10 (our minimum supported Vulkan compute capability) if no Vulkan
335 * features are set. */
337
338 /** Was libHalide compiled with support for this target? */
339 bool supported() const;
340
341 /** Return a bitset of the Featuress set in this Target (set = 1).
342 * Note that while this happens to be the current internal representation,
343 * that might not always be the case. */
344 const std::bitset<FeatureEnd> &get_features_bitset() const {
345 return features;
346 }
347
348 /** Return the name corresponding to a given Feature, in the form
349 * used to construct Target strings (e.g., Feature::Debug is "debug" and not "Debug"). */
351
352 /** Return the feature corresponding to a given name, in the form
353 * used to construct Target strings (e.g., Feature::Debug is "debug" and not "Debug").
354 * If the string is not a known feature name, return FeatureEnd. */
355 static Target::Feature feature_from_name(const std::string &name);
356
357private:
358 /** A bitmask that stores the active features. */
359 std::bitset<FeatureEnd> features;
360
361 /** Attempt to validate that all features set are sensible for the base Target.
362 * This is *not* guaranteed to get all invalid combinations, but is intended
363 * to catch at least the most common (e.g., setting arm-specific features on x86). */
364 void validate_features() const;
365};
366
367/** Return the target corresponding to the host machine. */
369
370/** Return the target that Halide will use. If HL_TARGET is set it
371 * uses that. Otherwise calls \ref get_host_target */
373
374/** Return the target that Halide will use for jit-compilation. If
375 * HL_JIT_TARGET is set it uses that. Otherwise calls \ref
376 * get_host_target. Throws an error if the architecture, bit width,
377 * and OS of the target do not match the host target, so this is only
378 * useful for controlling the feature set. */
380
381/** Get the Target feature corresponding to a DeviceAPI. For device
382 * apis that do not correspond to any single target feature, returns
383 * Target::FeatureEnd */
385
386namespace Internal {
387
389}
390
391} // namespace Halide
392
393#endif
Defines DeviceAPI.
This file declares the routines used by Halide internally in its runtime.
halide_target_feature_t
Optional features a compilation Target can have.
@ halide_target_feature_large_buffers
Enable 64-bit buffer indexing to support buffers > 2GB. Ignored if bits != 64.
@ halide_target_feature_fma
Enable x86 FMA instruction.
@ halide_target_feature_wasm_bulk_memory
Enable +bulk-memory instructions for WebAssembly codegen.
@ halide_target_feature_tsan
Enable hooks for TSAN support.
@ halide_target_feature_msan
Enable hooks for MSAN support.
@ halide_target_feature_avx512_zen4
Enable the AVX512 features supported by Zen4 processors. This include all of the Cannonlake features,...
@ halide_target_feature_wasm_threads
Enable use of threads in WebAssembly codegen. Requires the use of a wasm runtime that provides pthrea...
@ halide_target_feature_trace_loads
Trace all loads done by the pipeline. Equivalent to calling Func::trace_loads on every non-inlined Fu...
@ halide_target_feature_enable_llvm_loop_opt
Enable loop vectorization + unrolling in LLVM. Overrides halide_target_feature_disable_llvm_loop_opt....
@ halide_target_feature_no_asserts
Disable all runtime checks, for slightly tighter code.
@ halide_target_feature_cl_doubles
Enable double support on OpenCL targets.
@ halide_target_feature_rvv
Enable RISCV "V" Vector Extension.
@ halide_target_feature_avx2
Use AVX 2 instructions. Only relevant on x86.
@ halide_target_feature_trace_realizations
Trace all realizations done by the pipeline. Equivalent to calling Func::trace_realizations on every ...
@ halide_target_feature_c_plus_plus_mangling
Generate C++ mangled names for result function, et al.
@ halide_target_feature_vulkan_float16
Enable Vulkan 16-bit float support.
@ halide_target_feature_no_runtime
Do not include a copy of the Halide runtime in any generated object file or assembly.
@ halide_target_feature_hvx_v65
Enable Hexagon v65 architecture.
@ halide_target_feature_debug
Turn on debug info and output for runtime code.
@ halide_target_feature_embed_bitcode
Emulate clang -fembed-bitcode flag.
@ halide_target_feature_wasm_simd128
Enable +simd128 instructions for WebAssembly codegen.
@ halide_target_feature_vulkan
Enable Vulkan runtime support.
@ halide_target_feature_end
A sentinel. Every target is considered to have this feature, and setting this feature does nothing.
@ halide_llvm_large_code_model
Use the LLVM large code model to compile.
@ halide_target_feature_profile_by_timer
Alternative to halide_target_feature_profile using timer interrupt for systems without threads or app...
@ halide_target_feature_semihosting
Used together with Target::NoOS for the baremetal target built with semihosting library and run with ...
@ halide_target_feature_soft_float_abi
Enable soft float ABI. This only enables the soft float ABI calling convention, which does not necess...
@ halide_target_feature_sve2
Enable ARM Scalable Vector Extensions v2.
@ halide_target_feature_d3d12compute
Enable Direct3D 12 Compute runtime.
@ halide_target_feature_cuda_capability86
Enable CUDA compute capability 8.6 (Ampere)
@ halide_target_feature_avx512_skylake
Enable the AVX512 features supported by Skylake Xeon server processors. This adds AVX512-VL,...
@ halide_target_feature_avx512_cannonlake
Enable the AVX512 features expected to be supported by future Cannonlake processors....
@ halide_target_feature_metal
Enable the (Apple) Metal runtime.
@ halide_target_feature_hvx_128
Enable HVX 128 byte mode.
@ halide_target_feature_cuda_capability70
Enable CUDA compute capability 7.0 (Volta)
@ halide_target_feature_fma4
Enable x86 (AMD) FMA4 instruction set.
@ halide_target_feature_cuda_capability30
Enable CUDA compute capability 3.0 (Kepler)
@ halide_target_feature_no_neon
Avoid using NEON instructions. Only relevant for 32-bit ARM.
@ halide_target_feature_cuda_capability61
Enable CUDA compute capability 6.1 (Pascal)
@ halide_target_feature_armv7s
Generate code for ARMv7s. Only relevant for 32-bit ARM.
@ halide_target_feature_spirv
Enable SPIR-V code generation support.
@ halide_target_feature_trace_pipeline
Trace the pipeline.
@ halide_target_feature_cl_atomic64
Enable 64-bit atomics operations on OpenCL targets.
@ halide_target_feature_egl
Force use of EGL support.
@ halide_target_feature_hvx_v68
Enable Hexagon v68 architecture.
@ halide_target_feature_avx10_1
Intel AVX10 version 1 support. vector_bits is used to indicate width.
@ halide_target_feature_profile
Launch a sampling profiler alongside the Halide pipeline that monitors and reports the runtime used b...
@ halide_target_feature_strict_float
Turn off all non-IEEE floating-point optimization. Currently applies only to LLVM targets.
@ halide_target_feature_cuda_capability35
Enable CUDA compute capability 3.5 (Kepler)
@ halide_target_feature_asan
Enable hooks for ASAN support.
@ halide_target_feature_cl_half
Enable half support on OpenCL targets.
@ halide_target_feature_vulkan_float64
Enable Vulkan 64-bit float support.
@ halide_target_feature_arm_dot_prod
Enable ARMv8.2-a dotprod extension (i.e. udot and sdot instructions)
@ halide_target_feature_avx512_sapphirerapids
Enable the AVX512 features supported by Sapphire Rapids processors. This include all of the Zen4 feat...
@ halide_target_feature_vulkan_version13
Enable Vulkan v1.3 runtime target support.
@ halide_target_feature_vulkan_version12
Enable Vulkan v1.2 runtime target support.
@ halide_target_feature_sse41
Use SSE 4.1 and earlier instructions. Only relevant on x86.
@ halide_target_feature_power_arch_2_07
Use POWER ISA 2.07 new instructions. Only relevant on POWERPC.
@ halide_target_feature_opencl
Enable the OpenCL runtime.
@ halide_target_feature_trace_stores
Trace all stores done by the pipeline. Equivalent to calling Func::trace_stores on every non-inlined ...
@ halide_target_feature_hexagon_dma
Enable Hexagon DMA buffers.
@ halide_target_feature_avx512
Enable the base AVX512 subset supported by all AVX512 architectures. The specific feature sets are AV...
@ halide_target_feature_avx512_knl
Enable the AVX512 features supported by Knight's Landing chips, such as the Xeon Phi x200....
@ halide_target_feature_cuda_capability50
Enable CUDA compute capability 5.0 (Maxwell)
@ halide_target_feature_arm_fp16
Enable ARMv8.2-a half-precision floating point data processing.
@ halide_target_feature_hvx_v62
Enable Hexagon v62 architecture.
@ halide_target_feature_cuda
Enable the CUDA runtime. Defaults to compute capability 2.0 (Fermi)
@ halide_target_feature_armv81a
Enable ARMv8.1-a instructions.
@ halide_target_feature_webgpu
Enable the WebGPU runtime.
@ halide_target_feature_sanitizer_coverage
Enable hooks for SanitizerCoverage support.
@ halide_target_feature_cuda_capability80
Enable CUDA compute capability 8.0 (Ampere)
@ halide_target_feature_wasm_mvponly
Disable all extensions to WebAssembly codegen (including +sign-ext and +nontrapping-fptoint,...
@ halide_target_feature_f16c
Enable x86 16-bit float support.
@ halide_target_feature_vulkan_int16
Enable Vulkan 16-bit integer support.
@ halide_target_feature_cuda_capability32
Enable CUDA compute capability 3.2 (Tegra K1)
@ halide_target_feature_jit
Generate code that will run immediately inside the calling process.
@ halide_target_feature_avx
Use AVX 1 instructions. Only relevant on x86.
@ halide_target_feature_cuda_capability75
Enable CUDA compute capability 7.5 (Turing)
@ halide_target_feature_check_unsafe_promises
Insert assertions for promises.
@ halide_target_feature_vsx
Use VSX instructions. Only relevant on POWERPC.
@ halide_target_feature_vulkan_int8
Enable Vulkan 8-bit integer support.
@ halide_target_feature_vulkan_int64
Enable Vulkan 64-bit integer support.
@ halide_target_feature_user_context
Generated code takes a user_context pointer as first argument.
@ halide_target_feature_no_bounds_query
Disable the bounds querying functionality.
@ halide_target_feature_vulkan_version10
Enable Vulkan v1.0 runtime target support.
@ halide_target_feature_fuzz_float_stores
On every floating point store, set the last bit of the mantissa to zero. Pipelines for which the outp...
@ halide_target_feature_sve
Enable ARM Scalable Vector Extensions.
@ halide_target_feature_x86_apx
Intel x86 APX support. Covers initial set of features released as APX: egpr,push2pop2,...
@ halide_target_feature_hvx_v66
Enable Hexagon v66 architecture.
Defines halide types.
This file defines the class FunctionDAG, which is our representation of a Halide pipeline,...
Target get_host_target()
Return the target corresponding to the host machine.
@ Internal
Not visible externally, similar to 'static' linkage in C.
Target::Feature target_feature_for_device_api(DeviceAPI api)
Get the Target feature corresponding to a DeviceAPI.
Target get_jit_target_from_environment()
Return the target that Halide will use for jit-compilation.
DeviceAPI
An enum describing a type of device API.
Definition DeviceAPI.h:15
Target get_target_from_environment()
Return the target that Halide will use.
Internal::ConstantInterval cast(Type t, const Internal::ConstantInterval &a)
Cast operators for ConstantIntervals.
unsigned __INT64_TYPE__ uint64_t
signed __INT64_TYPE__ int64_t
A struct representing a target machine and os to generate code for.
Definition Target.h:19
bool get_runtime_compatible_target(const Target &other, Target &result)
Create a "greatest common denominator" runtime target that is compatible with both this target and ot...
bool operator==(const Target &other) const
Definition Target.h:265
bool supports_type(const Type &t, DeviceAPI device) const
Does this target allow using a certain type on a certain device.
bool supports_device_api(DeviceAPI api) const
Returns whether a particular device API can be used with this Target.
bool has_gpu_feature() const
Is a fully feature GPU compute runtime enabled? I.e.
static std::string feature_to_name(Target::Feature feature)
Return the name corresponding to a given Feature, in the form used to construct Target strings (e....
static Target::Feature feature_from_name(const std::string &name)
Return the feature corresponding to a given name, in the form used to construct Target strings (e....
Target(OS o, Arch a, int b, const std::vector< Feature > &initial_features=std::vector< Feature >())
Definition Target.h:185
void set_features(const std::vector< Feature > &features_to_set, bool value=true)
bool has_large_buffers() const
Return true iff 64 bits and has_feature(LargeBuffers).
Definition Target.h:313
enum Halide::Target::Arch arch
int64_t maximum_buffer_size() const
Return the maximum buffer size in bytes supported on this Target.
Definition Target.h:320
bool has_feature(Feature f) const
int natural_vector_size() const
Given a data type, return an estimate of the "natural" vector size for that data type when compiling ...
Definition Target.h:308
Target()=default
Target(const std::string &s)
Given a string of the form used in HL_TARGET (e.g.
enum Halide::Target::Processor processor_tune
int bits
The bit-width of the target machine.
Definition Target.h:50
Processor
The specific processor to be targeted, tuned for.
Definition Target.h:61
@ BdVer3
Tune for AMD Piledriver CPU (AMD Family 15h (2nd-gen), launched 2012).
Definition Target.h:70
@ ZnVer4
Tune for AMD Zen 3 CPU (AMD Family 19h, launched 2020).
Definition Target.h:76
@ AMDFam10
Tune for later versions of AMD K8 CPU, with SSE3 support.
Definition Target.h:66
@ ZnVer3
Tune for AMD Zen 2 CPU (AMD Family 17h, launched 2019).
Definition Target.h:75
@ K8_SSE3
Tune for AMD K8 Hammer CPU (AMD Family 0Fh, launched 2003).
Definition Target.h:65
@ ZnVer1
Tune for AMD Jaguar CPU (AMD Family 16h, launched 2013).
Definition Target.h:73
@ BdVer1
Tune for AMD Bobcat CPU (AMD Family 14h, launched 2011).
Definition Target.h:68
@ BtVer1
Tune for AMD K10 "Barcelona" CPU (AMD Family 10h, launched 2007).
Definition Target.h:67
@ ZnVer2
Tune for AMD Zen CPU (AMD Family 17h, launched 2017).
Definition Target.h:74
@ BdVer4
Tune for AMD Steamroller CPU (AMD Family 15h (3nd-gen), launched 2014).
Definition Target.h:71
@ BdVer2
Tune for AMD Bulldozer CPU (AMD Family 15h, launched 2011).
Definition Target.h:69
@ BtVer2
Tune for AMD Excavator CPU (AMD Family 15h (4th-gen), launched 2015).
Definition Target.h:72
@ ProcessorGeneric
Do not tune for any specific CPU. In practice, this means that halide will decide the tune CPU based ...
Definition Target.h:63
Target(OS o, Arch a, int b, Processor pt, const std::vector< Feature > &initial_features=std::vector< Feature >(), int vb=0)
Definition Target.h:176
enum Halide::Target::OS os
std::string to_string() const
Convert the Target into a string form that can be reconstituted by merge_string(),...
static bool validate_target_string(const std::string &s)
Check if a target string is valid.
Target without_feature(Feature f) const
Return a copy of the target with the given feature cleared.
const std::bitset< FeatureEnd > & get_features_bitset() const
Return a bitset of the Featuress set in this Target (set = 1).
Definition Target.h:344
Feature
Optional features a target can have.
Definition Target.h:83
@ CheckUnsafePromises
Definition Target.h:143
@ EnableLLVMLoopOpt
Definition Target.h:145
@ TraceRealizations
Definition Target.h:137
@ AVX512_Cannonlake
Definition Target.h:132
@ AVX512_SapphireRapids
Definition Target.h:133
@ SanitizerCoverage
Definition Target.h:158
@ LLVMLargeCodeModel
Definition Target.h:155
@ CUDACapability30
Definition Target.h:99
@ CPlusPlusMangling
Definition Target.h:117
@ POWER_ARCH_2_07
Definition Target.h:97
bool operator!=(const Target &other) const
Definition Target.h:273
bool supported() const
Was libHalide compiled with support for this target?
DeviceAPI get_required_device_api() const
If this Target (including all Features) requires a specific DeviceAPI, return it.
bool has_feature(halide_target_feature_t f) const
Definition Target.h:217
bool has_unknowns() const
Return true if any of the arch/bits/os fields are "unknown"/0; return false otherwise.
bool features_any_of(const std::vector< Feature > &test_features) const
void set_feature(Feature f, bool value=true)
bool supports_type(const Type &t) const
Does this target allow using a certain type.
int get_vulkan_capability_lower_bound() const
Get the minimum Vulkan capability found as an integer.
int get_cuda_capability_lower_bound() const
Get the minimum cuda capability found as an integer.
Target with_feature(Feature f) const
Return a copy of the target with the given feature set.
int natural_vector_size(const Halide::Type &t) const
Given a data type, return an estimate of the "natural" vector size for that data type when compiling ...
bool features_all_of(const std::vector< Feature > &test_features) const
Arch
The architecture used by the target.
Definition Target.h:39
OS
The operating system used by the target.
Definition Target.h:23
@ WebAssemblyRuntime
Definition Target.h:33
int vector_bits
The bit-width of a vector register for targets where this is configurable and targeting a fixed size ...
Definition Target.h:55
Target(const char *s)
Types in the halide type system.
Definition Type.h:283